This blog is where the bench work gets written down. ApotheoTech ships FPGA IP cores and hardware for high-speed imaging, and most of what we learn doing that never fits in a datasheet: the link that wouldn't train until one equalization setting moved, the DMA engine that stalled every 4 GB, the sensor that disagreed with its own documentation.
What to expect here
- SLVS-EC bring-up notes — getting Sony sensors talking on Kria and UltraScale+ platforms, lane by lane.
- CoaXPress in practice — link training, host vs device personalities, and debugging CXP-12 on real cable plants.
- Sustained capture — what it actually takes to write a high-rate camera stream to NVMe without dropping frames.
- Hardware war stories — PCB revisions, transceiver tuning, and the occasional lesson learned the expensive way.
Posts will be technical, specific, and written for engineers doing this work themselves. If there's a topic you want covered, tell us.